Polycrystalline Si optimization for 45nm node Ni-FUSI gate

Author

Shi, X. ; Schaekers, M. ; Rothschild, A. ; Everaert, J.-L. ; Moussa, A. ; Richard, O. ; Brus, S. ; Rosseel, E. ; Date, L.

Author_Institution

IMEC, Leuven

fYear

2006

fDate

23-26 Oct. 2006

Firstpage

421

Lastpage

423

Abstract

In this paper, the authors report the impact of polycrystalline Si structure on the NMOS transistor performance with a HfSiON/Ni-FUSI (fully silicided) gate. For polycrystalline films, as deposited grain structure was predominantly columnar at heater temperatures 690-730degC, except in the presence of hydrogen where the grains assume a random microcrystalline structure. Amorphous film was achieved by lowering the heater temperature down to 610C. The impact of the deposition temperature and adding H₂ during the deposition on the poly-Si film structure and surface roughness is investigated. Ni-FUSI gate electrode was fabricated with these different structures. The resulting NMOS transistor performance is discussed

Keywords

MOSFET; crystal structure; hafnium compounds; hydrogen; semiconductor thin films; silicon; surface roughness; 45 nm; 610 C; 690 to 730 C; H₂; HfSiON-Ni; NMOS transistors; amorphous film; deposition temperature; grain structure; heater temperature; microcrystalline structure; polycrystalline films; surface roughness; Amorphous materials; Atomic force microscopy; Hydrogen; MOSFETs; Rough surfaces; Scanning electron microscopy; Surface morphology; Surface roughness; Temperature; Transmission electron microscopy;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on

Conference_Location

Shanghai

Print_ISBN

1-4244-0160-7

Electronic_ISBN

1-4244-0161-5

Type

conf

DOI

10.1109/ICSICT.2006.306267

Filename

4098124