Digital phase locked loops for satellite communications

This paper documents an investigation into the behaviour of a digital phase locked loop which includes a hard limiter following the phase detector. The Chapman-Kolmogorov integral equation is utilised to allow calculation of the phase error density for both first and second order loops. Analytic results for the mean phase error and phase error variance are presented for the first order loop. The loop is considered in the context of usage in the modem symbol timing recovery function