DocumentCode
3464648
Title
Manufacturing yield ramp-up methodology for advanced technology
Author
Kuei, Johnny ; Weng, Yulei ; Li, Jianxun ; Schmidt, Andreas ; Daldoss, Lidia ; Gardner, James
fYear
2006
fDate
23-26 Oct. 2006
Firstpage
501
Lastpage
504
Abstract
In this paper, we present an integrated yield ramp approach with short loop and precise yield modeling. The short loop allows quicker cycle time and overall yield ramp up to world class yield level with above industry average arima learning rate. In order for the short loop to be an effective vehicle, it must cover the entire design and process space and provide accurate fail rate
Keywords
manufacturing processes; advanced technology; cycle time; manufacturing yield ramp-up methodology; short loop; Degradation; Inspection; Observability; Process design; Product design; Pulp manufacturing; Space technology; Space vehicles; System testing; Virtual manufacturing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location
Shanghai
Print_ISBN
1-4244-0160-7
Electronic_ISBN
1-4244-0161-5
Type
conf
DOI
10.1109/ICSICT.2006.306336
Filename
4098149
Link To Document