Title :
Contamination control using production test data
Author :
Kwon, Young Jun ; Walker, Duncan M H
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
Abstract :
This paper presents a methodology to identify suspect process steps during ramp and maturity of an IC fabrication line by utilizing the production functional testing results and to generate a defect Pareto to prioritize defect contamination control
Keywords :
chemical variables control; fault diagnosis; integrated circuit yield; probability; production control; production testing; semiconductor process modelling; surface contamination; CAD tools; EDA tools; IC fabrication line; defect Pareto; defect contamination control; production functional testing results; production test data; suspect process step identification; yield loss; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Contamination; Fabrication; Integrated circuit testing; Pollution measurement; Production; Semiconductor device measurement;
Conference_Titel :
Electronics Manufacturing Technology Symposium, 1995. 'Manufacturing Technologies - Present and Future', Seventeenth IEEE/CPMT International
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-2996-1
DOI :
10.1109/IEMT.1995.526095
