• DocumentCode
    3465225
  • Title

    Razor II: In Situ Error Detection and Correction for PVT and SER Tolerance

  • Author

    Blaauw, David ; Kalaiselvan, Sudherssen ; Lai, Kevin ; Ma, Wei-Hsiang ; Pant, Sanjay ; Tokunaga, Carlos ; Das, Shidhartha ; Bull, David

  • Author_Institution
    Univ. of Michigan, Ann Arbor, MI
  • fYear
    2008
  • fDate
    3-7 Feb. 2008
  • Firstpage
    400
  • Lastpage
    622
  • Abstract
    We take advantage of these findings and propose a Razor II approach that introduces two components. First, instead of performing both error detection and correction in the FF, Razor II performs only detection in the FF, while correction is performed through architectural replay.
  • Keywords
    error correction; error detection; PVT tolerance; Razor II; SER tolerance; error correction; error detection; Clocks; Error analysis; Error correction; Frequency; Microprocessors; Phase detection; Pipelines; Solid state circuits; Testing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International
  • Conference_Location
    San Francisco, CA
  • Print_ISBN
    978-1-4244-2010-0
  • Electronic_ISBN
    978-1-4244-2011-7
  • Type

    conf

  • DOI
    10.1109/ISSCC.2008.4523226
  • Filename
    4523226
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3465225