Title :
Compiler optimizations for the PA-8000
Author_Institution :
Hewlett-Packard Co., USA
Abstract :
Compiler optimizations play a key role in unlocking the performance of the PA-8000 (L. Gwennap, 1994), an innovative dynamically scheduled machine which is the first implementation of the 64 bit PA 2.0 member of the HP PA-RISC architecture family. This wide superscalar, long out of order machine provides significant execution bandwidth and automatically hides latency at runtime; however despite its ample hardware resources, many of the optimizing transformations which proved effective for the PA-8000 served to augment its ability to exploit the available bandwidth and to hide latency. While legacy codes benefit from the PA-8000´s sophisticated hardware, recompilation of old binaries can be vital to realizing the full potential of the PA-8000, given the impact of new compilers in achieving peak performance for this machine.
Keywords :
optimising compilers; reduced instruction set computing; scheduling; HP PA-RISC architecture family; PA-8000; compiler optimizations; execution bandwidth; hardware resources; innovative dynamically scheduled machine; latency hiding; legacy codes; optimizing transformations; sophisticated hardware; wide superscalar machine; Cloning; Delay; Instruments; Optimizing compilers; Pipeline processing; Registers; Switches;
Conference_Titel :
Compcon '97. Proceedings, IEEE
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-8186-7804-6
DOI :
10.1109/CMPCON.1997.584678