DocumentCode
3465633
Title
A 1V 16.9ppm/°C 250nA Switched-Capacitor CMOS Voltage Reference
Author
Huang, Hong-Wei ; Hsieh, Chun-Yu ; Chen, Ke-Horng ; Kuo, Sy-Yen
Author_Institution
Taipei, Nat. Taiwan Univ., Taipei
fYear
2008
fDate
3-7 Feb. 2008
Firstpage
438
Lastpage
626
Abstract
We have developed a switched-capacitor CMOS voltage reference (SCVR). The circuit is shown in Fig. 24.3.2 and is composed of a low-power bias circuit [G. De Vita and G. iannacone, 2007], a core circuit and a switched-capacitor difference amplifier that is insensitive to op-amp offset voltage. The clock signals (phi1, phi2, phi2´) are non-overlapping to prevent leakage. The core circuit supplies Vgs1 and Vgs2 to the switched-capacitor difference amplifier on phases phi1 and phi2, respectively. The difference amplifier then generates an output, which has a low TC, based on the gate-source voltage difference, AVGS.
Keywords
CMOS integrated circuits; capacitor switching; differential amplifiers; low-power electronics; switched capacitor networks; clock signal; core circuit; current 250 nA; gate-source voltage difference; op-amp offset voltage; switched-capacitor CMOS voltage reference; switched-capacitor difference amplifier; voltage 1 V; Analog circuits; Analog-digital conversion; Buffer storage; Diodes; MOSFETs; Operational amplifiers; Switches; Switching circuits; Temperature dependence; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International
Conference_Location
San Francisco, CA
Print_ISBN
978-1-4244-2010-0
Electronic_ISBN
978-1-4244-2011-7
Type
conf
DOI
10.1109/ISSCC.2008.4523245
Filename
4523245
Link To Document