Implementation of an NIC (nearly instantaneous companding) 32 kbps transcoder using the TMS320C25 digital signal processor

The authors present the design of a 32 kb/s data adaptive NIC transcoding algorithm and its implementation on the TMS320C25 digital signal processor. Some preliminary test results are presented for a single-stage rate-change filter for the rate conversion from 8 kHz to 6.667 kHz and vice versa. A two-stage rate-change filter using the combined decimator and rate-change filter approach is then designed to replace the original 128-tap single-filter. It is shown that since a rate change rate from 40 kHz to 6.667 kHz requires a decimation factor of M=6, a two-stage decimation of M=3 followed by M=2 will lead to further savings because a decimation filter for M=3 requires 11 taps while that for M=2 requires 53 taps