Two-bit/cell Nitride Trapping Nonvolatile Memory and Reliability

For two-bit/cell nitride trapping nonvolatile memory, the V_T window is limited due "2nd bit effect". It suffers program state instability because BTBT-HH erase generates interface traps. During data retention time, the annealing of interface traps causes "apparent" program-state V_T loss, since passivation of interface trap charge is indistinguishable from real charge loss. We report, for the first time, a method that completely stops the swing degradation by using an ultra-low hydrogen array-nitride-sealing (ANS) ONO process. This novel approach provides both a robust BOX, which is resistant to hot hole degradation, and a sealed BOX/Si interface that is immune from hydrogen. The new device shows excellent erased state V_T stability, and >1.5V V_T window after 10K P/E cycles and baking, leaving plenty of DeltaV_T window for flash applications