DocumentCode :
3466688
Title :
An innovative design of the DDR/DDR2 SDRAM compatible controller
Author :
Shuang-Yan, Chen ; Dong-Hui, Wang ; Rui, Shan ; Chao-Huan, Hou
Author_Institution :
Inst. of Acoust., Chinese Acad. of Sci., Beijing, China
Volume :
1
fYear :
2005
fDate :
24-27 Oct. 2005
Firstpage :
62
Lastpage :
66
Abstract :
With the rapid increases of computer performance in recent years, the frequency and performance of memory are required to be higher and higher. Just using DDR SDRAM (DDR), we can´t meet the demands. Compared with DDR, DDR2 SDRAM (DDR2) has higher speed, lower power, higher efficiency, and higher stability. A recent statistics shows that DDR2 will replace DDR in one or two years, but DDR is still prevailing today. For this reason, based on a common standard bus interface, an innovative design of the DDR/DDR2 SDRAM compatible controller is implemented and verified in this paper. If this compatible controller can be included in the computer architecture, the system will be more flexible and transplantable. Besides, during the period when DDR is replaced by DDR2, using this controller will greatly shorten time to market, lessen manual work and reduce product cost.
Keywords :
DRAM chips; memory architecture; microcontrollers; DDR SDRAM; DDR2 SDRAM; common standard bus interface; compatible controller; computer architecture; memory frequency; memory performance; product cost reduction; Computer architecture; Computer performance; Control systems; Costs; DRAM chips; Frequency; SDRAM; Stability; Statistics; Time to market;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2005. ASICON 2005. 6th International Conference On
Print_ISBN :
0-7803-9210-8
Type :
conf
DOI :
10.1109/ICASIC.2005.1611269
Filename :
1611269
Link To Document :
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