Title :
A Clockless ADC/DSP/DAC System with Activity-Dependent Power Dissipation and No Aliasing
Author :
Schell, Bob ; Tsividis, Yannis
Author_Institution :
Columbia Univ., New York, NY
Abstract :
In this work, these issues are addressed and solved, and an entire ADC/DSP/DAC 8b system is implemented in a UMC 90nm CMOS process with a 1V supply.
Keywords :
CMOS integrated circuits; analogue-digital conversion; digital signal processing chips; digital-analogue conversion; ADC/DSP/DAC system; CMOS process; activity-dependent power dissipation; analogue-digital conversion; digital signal processing chips; digital-analogue conversion; size 90 nm; voltage 1 V; Clocks; Delay; Digital signal processing; Digital signal processing chips; Finite impulse response filter; Frequency response; Power dissipation; Power harmonic filters; Quantization; Sampling methods;
Conference_Titel :
Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-2010-0
Electronic_ISBN :
978-1-4244-2011-7
DOI :
10.1109/ISSCC.2008.4523301