An efficient low complexity LDPC encoder based on LU factorization with pivoting

In this paper, we present an efficient encoder for regular and irregular low-density parity-check (LDPC) codes with its complexity linear to code length. Inspired by the idea of Neal, we further exploit the sparsity of parity check matrix of LDPC codes and use extended LU factorization with pivoting in encoding process, which is flexible and supporting arbitrary H matrices, code rate and block lengths. An FPGA implementation for a rate 1/2 regular (3,6) length 1536 LDPC code encoder is provided with throughput of 31 Mbps. An efficient memory organization for storing and performing computations on sparse matrices is also presented