DocumentCode :
3468850
Title :
A novel fault tolerant approach for SRAM-based FPGAs
Author :
Xu, Jian ; Si, Paifa ; Huang, Weikang ; Lombardi, Fabrizio
Author_Institution :
Fudan Univ., Shanghai, China
fYear :
1999
fDate :
1999
Firstpage :
40
Lastpage :
44
Abstract :
This paper presents a novel fault tolerant approach for SRAM-based FPGAs. The proposed approach includes a fault tolerant architecture and its related routing procedure. In the approach, both the overheads for CLBs and interconnects are considered. The fault tolerant routing procedure under this novel approach is simple and less time-consuming. We provide the simulation results and show that the proposed approach has lower overhead than previous methods found in technical literature
Keywords :
SRAM chips; fault tolerant computing; field programmable gate arrays; network routing; virtual machines; CLB overhead; SRAM-based FPGAs; fault tolerant architecture; fault tolerant routing procedure; interconnect overhead; simulation; Application specific integrated circuits; Circuit faults; Circuit synthesis; Fault tolerance; Field programmable gate arrays; Integrated circuit interconnections; Laboratories; Logic arrays; Routing; Tiles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Dependable Computing, 1999. Proceedings. 1999 Pacific Rim International Symposium on
Print_ISBN :
0-7695-0371-3
Type :
conf
DOI :
10.1109/PRDC.1999.816210
Filename :
816210
Link To Document :
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