DocumentCode
3468908
Title
Towards Unification of MOS Compact Models with the Unified Regional Approach
Author
Xing Zhou ; Chandrasekaran, K. ; Guan Huei See ; Zhaomin Zhu ; Guan Hui Lim ; Shihuan Lin ; Chengqing Wei ; Siau Ben Chiah ; Cheng, Ming ; Sanford Chu ; Liang-Choo Hsia ; Subhash Rustagi
Author_Institution
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
fYear
2006
fDate
23-26 Oct. 2006
Firstpage
1193
Lastpage
1197
Abstract
MOSFETs have been the building blocks of modern VLSI for decades. As classical bulk-CMOS scaling is approaching its physical limit, various types of non-classical CMOS emerge. Although different in structure, topology, and operation, different types of MOSFETs essentially function in a similar way governed by the same physical principles. Accompanied with technology advancement, MOS compact models (CM) that are used in circuit simulators for designing integrated circuits have gone through many generations of development. Learning from past experience, it is important to construct a core model that is extendable to future technologies and devices rather than always "chasing" the technology. A careful examination of the fundamental physical equations governing various types of devices and operations is therefore necessary in order to come up with an approach to unifying various models into one framework. In this paper, we review the basic voltage equations for the generic MOS transistor. We extend our unified regional modeling (URM) approach to bulk-MOS charge modeling with non-pinned surface potential for various device structures, such as partially-depleted (PD) or fully-depleted (FD) ultra-thin body (UTB) SOI as well as symmetric/asymmetric double-gate (s-DG/a-DG). The regional solutions make it easy to handle different device structures with explicit asymptotically physical solutions, and the unified solution combines the best features in different modeling approaches, such as surface-potential/inversion-charge/threshold-voltage based models, without the need to solve exactly at flat-band voltage. We show that it is viable to obtain a unified solution scalable with layer thickness and doping in all accumulation, depletion, weak/volume/strong inversion regions. The ultimate goal is to have one generic and scalable model with selectable accuracy and seamless transition across device types and operations
Keywords
MOSFET; semiconductor device models; surface potential; MOS compact models; basic voltage equations; bulk-MOS charge modeling; fully-depleted ultra-thin body SOI; generic MOS transistor; nonpinned surface potential; partially-depleted ultra-thin body SOI; surface-potential/inversion-charge/threshold-voltage based models; symmetric/asymmetric double-gate; unified regional approach; unified regional modeling approach; CMOS technology; Circuit topology; Equations; Integrated circuit modeling; Integrated circuit technology; MOSFETs; Semiconductor device modeling; Semiconductor process modeling; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location
Shanghai
Print_ISBN
1-4244-0160-7
Electronic_ISBN
1-4244-0161-5
Type
conf
DOI
10.1109/ICSICT.2006.306073
Filename
4098364
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