Impact of Intrinsic Parameter Fluctuations on SRAM Cell Design

Author

Cheng, B. ; Roy, S. ; Asenov, A.

Author_Institution

Dept. of Electron. & Electr. Eng., Glasgow Univ.

fYear

2006

fDate

23-26 Oct. 2006

Firstpage

1290

Lastpage

1292

Abstract

Intrinsic parameter fluctuations, arising from the granular nature of charge and matter, are predicted to be a critical roadblock to the future CMOS 6-T SRAM scaling. A hierarchal simulation methodology, which can fully collate intrinsic parameter fluctuation information into compact model sets, is employed to investigate the impact of random dopant fluctuation on SRAM static noise margin, and the bias control technology is introduced as a possible solution to improve the SRAM´s immunity to intrinsic parameter fluctuation

Keywords

CMOS integrated circuits; SRAM chips; integrated circuit modelling; scaling circuits; 6-T SRAM scaling; CMOS; SRAM cell design; bias control technology; compact model; hierarchal simulation; intrinsic parameter fluctuations; random dopant fluctuation; static noise margin; Circuit simulation; Fluctuations; Lattices; MOS devices; MOSFETs; Random access memory; Resource description framework; Semiconductor process modeling; Stability; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on

Conference_Location

Shanghai

Print_ISBN

1-4244-0160-7

Electronic_ISBN

1-4244-0161-5

Type

conf

DOI

10.1109/ICSICT.2006.306117

Filename

4098386

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3469253