DocumentCode
3469551
Title
Efficient Parameter Extraction Scheme in Ultra-Thin Gate Dielectric MOS Capacitor with Considerable Gate Leakage
Author
He, Daokui ; Quan, Wuyun
Author_Institution
ASIC & Syst. State-key Lab., Fudan Univ., Shanghai
fYear
2006
fDate
23-26 Oct. 2006
Firstpage
1336
Lastpage
1338
Abstract
Presented herein is a fast but accurate quantum C-V simulation, capable of extracting effective oxide thickness and other parameters based strictly on C-V data alone. The apparent C-V degradation in leaky dielectric MOSFETs is shown mitigated in sub-micrometer channel length device because of the diminished channel resistance and gate leakage
Keywords
MOS capacitors; MOSFET; semiconductor device breakdown; semiconductor device models; channel resistance; gate leakage; leaky dielectric MOSFET; oxide thickness; parameter extraction; quantum C-V simulation; sub-micrometer channel length device; ultra-thin gate dielectric MOS capacitor; Capacitance-voltage characteristics; Channel bank filters; Data mining; Degradation; Dielectrics; Gate leakage; MOS capacitors; MOSFETs; Parameter extraction; Poisson equations;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location
Shanghai
Print_ISBN
1-4244-0160-7
Electronic_ISBN
1-4244-0161-5
Type
conf
DOI
10.1109/ICSICT.2006.306153
Filename
4098401
Link To Document