DocumentCode
3469652
Title
FPGA design on saturation correction in radar digital IF receiver
Author
Yao, Zhendong ; Zhang, Fugui
Author_Institution
Chengdu Univ. of Inf. Technol.
Volume
2
fYear
2005
fDate
24-0 Oct. 2005
Firstpage
741
Lastpage
745
Abstract
In this work a customized digital hardware function unit is developed for saturation correction in weather radars. This unit acts to assure wide dynamic range of the radar receiver as AGC unit does in analog circuitry. To meet the requirement for real time processing, FPGA device is employed with VHDL design. Several experiments were conducted and the results show that receiver´s dynamic range increment is more than 6 dB
Keywords
automatic gain control; field programmable gate arrays; hardware description languages; meteorological radar; radar receivers; AGC unit; FPGA design; VHDL design; analog circuitry; digital IF receiver; digital hardware function unit; radar receiver; saturation correction; weather radars; Circuits; Dynamic range; Field programmable gate arrays; Hardware; Meteorological radar; Radar measurements; Radar signal processing; Semiconductor device measurement; Signal processing; Voltage; ADC; FPGA; VHDL; saturation correction; weather radar;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2005. ASICON 2005. 6th International Conference On
Conference_Location
Shanghai
Print_ISBN
0-7803-9210-8
Type
conf
DOI
10.1109/ICASIC.2005.1611423
Filename
1611423
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