• DocumentCode
    3469720
  • Title

    The 3-D parallel processor applied to matrix multiplication

  • Author

    Cheng, K. ; Cheng, Andrew

  • Author_Institution
    Innotest Inc., Hsinchu, Taiwan
  • fYear
    2013
  • fDate
    6-6 Sept. 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Matrix multiplication and inversion are frequently used in various fields for research and engineering application. It is a very important tool for imaging processing, speech recognition and signal processing such as spectral analysis, beam forming ⋯ etc... As the area of computer application has broadened, the quantity of data to be operated has greatly increased. With a serial machine as we have now in the 2-D computer system it is becoming too much time consuming in computation to meet the applications. The speed of data procession can be increased or improved by using a 3-D parallel processor, a 3-D IC hardware machine. This paper will describe how this 3-D IC design architecture for handling great number of data processing such as matrix computation as an example in comparing with the current 2-D machine in processing power and execution time.
  • Keywords
    data handling; integrated circuit design; mathematics computing; matrix multiplication; parallel processing; 2D computer system; 3D IC design architecture; 3D IC hardware machine; 3D parallel processor; computer application; data processing; data quantity; engineering application; execution time; integrated circuit; matrix inversion; matrix multiplication; processing power; research application; serial machine; Abstracts; Artificial intelligence; Noise measurement; Programming; Read only memory; Speech; Speech processing; karlc;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    e-Manufacturing & Design Collaboration Symposium (eMDC), 2013
  • Conference_Location
    Hsinchu
  • Type

    conf

  • DOI
    10.1109/eMDC.2013.6756044
  • Filename
    6756044