The future of CMOS wireless transceivers

Building blocks alone do not account for the current interest in CMOS for RF applications. The more compelling reason is the opportunities CMOS affords for large-scale integration. Modern wireless transceivers will increasingly blend digital blocks into conventional analog front-ends for frequency synthesis, adaptivity, multi-mode operation, and sophisticated detection. This raises questions such as how well digital CMOS circuits can co-exist on the same substrate as the radio front-end, or whether there is sufficient on-chip isolation in a low-cost package to guarantee stable operation of a receiver with more than 100 dB of baseband gain, or how the power amplifier modulates the on-chip local oscillator. The future of CMOS transceivers may well depend on satisfactory answers to these questions. This paper presents design techniques to mitigate these problems in a single-chip 900 MHz spread-spectrum transceiver implemented in 1 /spl mu/m CMOS, and measurements of the transceiver to validate their effectiveness.