DocumentCode :
3470513
Title :
Design of Dual-mode Equalizer for QAM Demodulator in FPGA
Author :
Jiang, Zhou ; Liu, Zhi ; Jin, Rong-Hua ; Zeng, Xiao-Yang
Author_Institution :
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai
fYear :
2006
fDate :
23-26 Oct. 2006
Abstract :
This paper deals with the design of a dual-mode equalizer for QAM demodulator in FPGA. The fractionally spaced mode is supported as well as conventional symbol-spaced mode without changing the clock rate. The equalizer can also be configured to handle spectrum inversion. Meanwhile we optimize the implementation architecture to reduce hardware complexity. Test results show that the equalizer can achieve high reliability at low hardware costs
Keywords :
demodulators; equalisers; field programmable gate arrays; quadrature amplitude modulation; FPGA; QAM demodulator; dual-mode equalizer; field programmable gate arrays; quadrature amplitude modulation; spectrum inversion; symbol-spaced mode; Cable TV; Circuits; Clocks; Decision feedback equalizers; Demodulation; Field programmable gate arrays; Hardware; Intersymbol interference; Least squares approximation; Quadrature amplitude modulation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0160-7
Electronic_ISBN :
1-4244-0160-7
Type :
conf
DOI :
10.1109/ICSICT.2006.306246
Filename :
4098450
Link To Document :
بازگشت