Title :
A 533 MHz BiCMOS superscalar microprocessor
Author :
Cohen, E.T. ; Ballard, J. ; Blomgren, J. ; Brashears, C.S. ; Moldenhauer, V. ; Pattin, J.
Author_Institution :
Exponential Technol., San Jose, CA, USA
Abstract :
This 533 MHz BiCMOS microprocessor is the fastest PC microprocessor to comply with the PowerPC* Architecture specification, and to fit on a daughter-card compatible with existing air-cooled, desk-side systems. The speed is achieved by combination of BiCMOS process technology and a microarchitecture with attention to technology capabilities. The three-way superscalar microarchitecture issues one integer or floating-point, one load/store, and one branch instruction in parallel. Two- to three-way superscalar is the architectural "sweet spot": enough hardware parallelism to be effective without requiring complex, out-of-order execution.
Keywords :
BiCMOS digital integrated circuits; integrated circuit design; microprocessor chips; parallel architectures; pipeline processing; 533 MHz; BiCMOS superscalar microprocessor; PC microprocessor; PowerPC* Architecture specification; air-cooled desk-side systems; branch instruction; floating-point; hardware parallelism; load/store; three-way superscalar microarchitecture; BiCMOS integrated circuits; Clocks; Delay; Driver circuits; Latches; Microarchitecture; Microprocessors; Phase locked loops; Pipelines; Read-write memory;
Conference_Titel :
Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC., 1997 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-3721-2
DOI :
10.1109/ISSCC.1997.585317
