Applying formal techniques in simulation-based verification

We present four strategies that enable more effective functional verification: apply induction; generalize the problem; exploit data independence; and finally, divide and conquer. These strategies originate from techniques used in formal verification, but they are equally applicable in simulation based verification flows. We show that by applying these strategies, one can often achieve more concise specification, improve simulation coverage and reduce debugging overhead. The goal of this paper is to introduce these strategies to hardware verification engineers and give them another set of tools to tackle the ever more complex task of functional verification