A 10GHz With Low Power And Low Noise Figure Amplifier Using 0.18/spl mu/m CMOS Technology

Author

Chen, Wu-Nan ; Cheng, Kuo-Hua ; Duan-Chang, Ting

Author_Institution

Dept. of Comput. & Commun., SHU-TE Univ., Kaohsiung

fYear

2006

fDate

23-26 Oct. 2006

Firstpage

1556

Lastpage

1558

Abstract

The purpose of this work is to explore the optimum LNA design that input impedance match, gain, noise figure, linearity, and power consumption, in this LNA design operating at the 10GHz has been simulated based on a TSMC 0.18-mum RF CMOS process. This paper presents a 10 GHz operation is designed and implemented in a standard cascode LNA technology for an 802.16a application. The LNA exhibits a noise figure of 2.4dB, power gain of 15.8-dB, input return loss of 15.7dB, 1dB compression point of -20.3dBm The power consumption is 18.9mW at Vcc = 1.8 V

Keywords

low noise amplifiers; low-power electronics; microwave amplifiers; 0.18 micron; 1.8 V; 10 GHz; 15.7 dB; 15.8 dB; 18.9 mW; 2.4 dB; 802.16a application; CMOS technology; RF CMOS process; low noise figure amplifier; standard cascode LNA technology; CMOS process; CMOS technology; Capacitance; Circuit noise; Energy consumption; Impedance matching; Low-noise amplifiers; Noise figure; Noise measurement; Radio frequency;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on

Conference_Location

Shanghai

Print_ISBN

1-4244-0160-7

Electronic_ISBN

1-4244-0161-5

Type

conf

DOI

10.1109/ICSICT.2006.306287

Filename

4098470