• DocumentCode
    3470963
  • Title

    Python for Development of OpenMP and CUDA Kernels for Multidimensional Data

  • Author

    Vacaliuc, B. ; Patlolla, D.R. ; D´Azevedo, E. ; Davidson, G.G. ; Munro, J.K. ; Evans, T.M. ; Joubert, W. ; Bell, Z.W.

  • Author_Institution
    Electron. & Embedded Syst., Oak Ridge Nat. Lab., Oak Ridge, TN, USA
  • fYear
    2011
  • fDate
    19-21 July 2011
  • Firstpage
    159
  • Lastpage
    167
  • Abstract
    Design of data structures for high performance computing (HPC) is one of the principal challenges facing researchers looking to utilize heterogeneous computing machinery. Heterogeneous systems derive cost, power, and speed efficiency by being composed of the appropriate hardware for the task. Yet, each type of processor requires a specific organization of the application state in order to achieve peak performance. Discovering this and refactoring the code can be a challenging and time-consuming task for the researcher, as the data structures and the computational model must be co-designed. We present a methodology that uses Python as the environment for which to explore tradeoffs in both the data structure design as well as the code executing on the computation accelerator. Our method enables multi-dimensional arrays to be used effectively in any target environment. We have chosen to focus on OpenMP and CUDA environments, thus exploring the development of optimized kernels for the two most common classes of computing hardware available today: multi-core CPU and GPU. Python´s large palette of file and network access routines, its associative indexing syntax and support for common HPC environments makes it relevant for diverse hardware ranging from laptops through computing clusters to the highest performance supercomputers. Our work enables researchers to accelerate the development of their codes on the computing hardware of their choice.
  • Keywords
    computer graphic equipment; coprocessors; data structures; CUDA Kernels; HPC; OpenMP Kernels; Python; code execution; computation accelerator; cost efficiency; data structures; high performance computing; machinery computing; multidimensional data; network access routines; power effiiciency; speed efficiency; Algorithms; Arrays; Computational modeling; Graphics processing unit; Kernel; Mathematical model;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Application Accelerators in High-Performance Computing (SAAHPC), 2011 Symposium on
  • Conference_Location
    Knoxville, TN
  • Print_ISBN
    978-1-4577-0635-6
  • Electronic_ISBN
    978-0-7695-4448-9
  • Type

    conf

  • DOI
    10.1109/SAAHPC.2011.26
  • Filename
    6031579