Title :
A 16b /spl Sigma//spl Delta/ pipeline ADC with 2.5 MHz output data-rate
Author :
Brooks, T.L. ; Robertson, D.H. ; Kelly, D.F. ; Del Muro, A. ; Harston, S.W.
Author_Institution :
Analog Devices Inc., Wilmington, MA, USA
Abstract :
A 16b 2.5 MHz A/D converter in 0.6 /spl mu/m CMOS addresses the need for wide dynamic range A/D converters with bandwidths in excess of 1 MHz in multi-tone communication. This A/D converter combines the advantages of /spl Sigma//spl Delta/ and pipeline A/D conversion techniques to provide wide dynamic range at a low-oversampling ratio. The device operates at a 20 MHz clock rate, 2.5 MHz output rate (8/spl times/ oversampling), and provides 89 dB SNR over a 1.25 MHz input bandwidth.
Keywords :
CMOS integrated circuits; pipeline processing; sigma-delta modulation; /spl Sigma//spl Delta/ pipeline ADC; 0.6 micron; 1.25 GHz; 16 bit; 2.5 MHz; 20 MHz; 89 dB; A/D converter; CMOS IC; multi-tone communication; oversampling; wide dynamic range; Amplitude modulation; Bandwidth; Circuit noise; Clocks; Digital modulation; Dynamic range; Feedback loop; Pipelines; Quantization; Signal resolution;
Conference_Titel :
Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC., 1997 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-3721-2
DOI :
10.1109/ISSCC.1997.585335
