Impact of process variation on soft error vulnerability for nanometer VLSI circuits

Author

Ding, Qian ; Luo, Rong ; Xie, Yuan

Author_Institution

Dept. of Electron. Eng., Tsinghua Univ., Beijing

Volume

2

fYear

2005

fDate

24-0 Oct. 2005

Firstpage

1117

Lastpage

1121

Abstract

In this paper, the impact of process variation on-soft error vulnerability for nanometer VLSI circuits is studied. Particle strike is modeled in SPICE as a current source connected to the node of interest. Q_critical of four kinds of circuits at different technology nodes is analyzed. Our simulation result shows that process variation can make Q_critical vary from -33.5% to 81.7% compared to the case without considering process variation. Because of the exponential dependence of SER on _critical, the result shows significant impact of process variation on SER. Gate length found to be the most important variability source while the influence of threshold voltage cannot be ignored

Keywords

SPICE; VLSI; integrated circuit modelling; nanoelectronics; SPICE; nanometer VLSI circuits; particle strike; process variation; soft error vulnerability; Circuits; Computer errors; Computer science; Leakage current; SPICE; Semiconductor device measurement; Semiconductor device modeling; Single event upset; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2005. ASICON 2005. 6th International Conference On

Conference_Location

Shanghai

Print_ISBN

0-7803-9210-8

Type

conf

DOI

10.1109/ICASIC.2005.1611503

Filename

1611503