A 2.488 Gb/s Si-bipolar clock and data recovery IC with robust loss of signal detection

Author

Walker, R. ; Stout, C. ; Yen, C.-S.

Author_Institution

Hewlett Packard Labs., Palo Alto, CA, USA

fYear

1997

fDate

8-8 Feb. 1997

Firstpage

246

Lastpage

247

Abstract

SONET 2.488Gb/s transmission and switching systems, network backbones, and video transmission are among the many application areas benefiting from inexpensive and robust clock and data recovery circuits (CDR). Previous commercial solutions have required multiple chips and GaAs processes to perform this function. This 25GHz f/sub T/ Si-bipolar chip operates from 2 to 3Gb/s over worst-case process, temperature and voltage variations, dissipating 1.77W from 5V/spl plusmn/10% supply, requiring a single off-chip filter capacitor. For network monitoring, a loss-of-signal (LOS) detector operates on phase-error events, with a trigger threshold programmable between 10/sup -4/ and 10/sup -6/ BER.

Keywords

SONET; bipolar integrated circuits; clocks; data communication; elemental semiconductors; phase locked loops; silicon; 1.77 W; 2.488 Gbit/s; 25 GHz; BER; CDR; SONET; bipolar chip; clock IC; data recovery IC; loss-of-signal (LOS) detector; network backbones; network monitoring; off-chip filter capacitor; phase-error events; robust loss of signal detection; temperature variations; trigger threshold; video transmission; voltage variations; worst-case process; Circuits; Clocks; Filters; Gallium arsenide; Robustness; SONET; Spine; Switching systems; Temperature; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC., 1997 IEEE International

Conference_Location

San Francisco, CA, USA

ISSN

0193-6530

Print_ISBN

0-7803-3721-2

Type

conf

DOI

10.1109/ISSCC.1997.585373

Filename

585373