DocumentCode :
3471344
Title :
Wafer-level Jramp and J-constant electromigration testing of conventional and SWEAT patterns assisted by a thermal and electrical simulator
Author :
Katto, H. ; Harada, M. ; Higuchi, Y.
Author_Institution :
Hitachi Ltd., Tokyo, Japan
fYear :
1991
fDate :
9-11 April 1991
Firstpage :
298
Lastpage :
305
Abstract :
For a quick analysis of wafer-level metal electromigration tests, an analytical thermal and electrical simulator was developed for conventional and SWEAT patterns. For the experimental current vs. resistance data, a fitting was made with oxide and metal thermal conductivity as the parameter, and good agreement was obtained between theory and experiment. A theory is created to show that the extrapolated lifetime can be quickly obtained by Jramp stress tests. Reliable values of the activation factor can be obtained by the combined use of several SWEAT patterns in J-constant tests.<>
Keywords :
circuit reliability; electromigration; integrated circuit testing; metallisation; quality control; simulation; temperature distribution; J-constant; Jramp; SWEAT patterns; activation factor; electrical simulator; electromigration testing; extrapolated lifetime; stress tests; thermal conductivity; thermal simulator; wafer-level metal; Acceleration; Current density; Electromigration; Equations; Heating; Isothermal processes; Pattern analysis; Semiconductor device modeling; Temperature; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium, 1991, 29th Annual Proceedings., International
Conference_Location :
Las Vegas, NV, USA
Print_ISBN :
0-87942-680-2
Type :
conf
DOI :
10.1109/RELPHY.1991.146032
Filename :
146032
Link To Document :
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