A 400 MPixel/s IDCT for HDTV by multibit coding and group symmetry

Author

Jun Rim Choi ; Won Jun Hur ; Kyoung Keun Lee ; Ae Shin Kim

Author_Institution

I.G. Electron. Res. Center, Seoul, South Korea

fYear

1997

fDate

8-8 Feb. 1997

Firstpage

262

Lastpage

263

Abstract

This inverse discrete cosine transform (IDCT) core provides motion-picture decompression at 400 MPixel/s for HDTV signals. The IDCT exploits the radix-two multibit coding and group symmetry of the matrix multiplication coefficients, to reduce the number of multiplications. It also features orthogonal memory to transpose the decompressed pixel data. The IDCT integrates 237k transistors, consumes 0.9 W at 3.3 V, and occupies 24 mm/sup 2/ in 0.6 /spl mu/m CMOS technology.

Keywords

CMOS digital integrated circuits; data compression; digital signal processing chips; discrete cosine transforms; high definition television; matrix multiplication; telecommunication computing; video coding; 0.6 micron; 0.9 W; 3.3 V; CMOS technology; DSP chip; HDTV signals; IDCT; decompressed pixel data; group symmetry; inverse DCT; inverse discrete cosine transform; matrix multiplication coefficients; motion-picture decompression; orthogonal memory; radix-two multibit coding; CMOS technology; Clocks; HDTV; Image coding; Image processing; Memory architecture; Multiplexing; Read only memory; Signal processing; Signal processing algorithms;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC., 1997 IEEE International

Conference_Location

San Francisco, CA, USA

ISSN

0193-6530

Print_ISBN

0-7803-3721-2

Type

conf

DOI

10.1109/ISSCC.1997.585380

Filename

585380