• DocumentCode
    3471508
  • Title

    Prediction of plasma charging damage during SiO2 etching by VicAddress

  • Author

    Yagisawa, T. ; Ohmori, T. ; Shimada, T. ; Makabe, T.

  • Author_Institution
    Sch. of Integrated Design Eng., Keio Univ., Yokohama, Japan
  • fYear
    2003
  • fDate
    24-25 April 2003
  • Firstpage
    97
  • Lastpage
    99
  • Abstract
    We have proposed a prototype of plasma processing CAD, i.e. Vertically Integrated Computer Aided Design for Device processing (VicAddress), that numerically predicts dry etching and related charging damage to a future profile and nanometer scale lower-level elements in ULSI, as well as the low temperature plasma structure. VicAddress has been applied to investigate the dry etching of SiO2 film, that requires ions with several hundred to a thousand of eV. Negative ion injection to a wafer was numerically predicted and designed in a pulsed two-frequency capacitively coupled plasma (2f-CCP) operated by a VHF (100 MHz) - LF (1 MHz) system. In this paper, we predict the velocity distribution incident on a wafer in a pulsed 2f-CCP by using a Monte Carlo method under the plasma structure given by RCT modeling. We discuss: functional separation of very high frequency sustaining and low frequency biasing sources; the negative charge injection mode to the SiO2 wafer during etching; and control of excess-dissociation of CFj by high energy secondary electrons.
  • Keywords
    CAD; Monte Carlo methods; ULSI; charge injection; semiconductor process modelling; silicon compounds; sputter etching; surface charging; 1 to 100 MHz; Monte Carlo method; RCT modeling; SiO2; SiO2 etching; ULSI; VHF sustaining biasing sources; VicAddress; charging damage; dry etching damage; excess dissociation control; functional separation; low frequency biasing sources; low temperature plasma structure; nanometer scale lower-level elements; negative charge injection mode; negative ion injection; numerical prediction; plasma charging damage; plasma processing CAD; pulsed two-frequency capacitively coupled plasma; velocity distribution; vertically integrated computer aided design for device processing; Design automation; Dry etching; Frequency; Nanoscale devices; Plasma applications; Plasma devices; Plasma materials processing; Plasma temperature; Process design; Prototypes;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Plasma- and Process-Induced Damage, 2003 8th International Symposium
  • Print_ISBN
    0-7803-7747-8
  • Type

    conf

  • DOI
    10.1109/PPID.2003.1200930
  • Filename
    1200930