• DocumentCode
    3472066
  • Title

    A high-performance autozeroed CMOS opamp with 50 /spl mu/V offset

  • Author

    Krummenacher, F. ; Vafadar, R. ; Ganesan, A. ; Valence, V.

  • Author_Institution
    MEAD Microelectronics SA, St.-Sulpice, Switzerland
  • fYear
    1997
  • fDate
    8-8 Feb. 1997
  • Firstpage
    350
  • Lastpage
    351
  • Abstract
    Bandwidth, DC gain, offset and noise are the major performance parameters that limit the applicability of operational amplifiers (opamps). The design of a general-purpose opamp in a digital CMOS process that offers excellent performance in all these categories is a long-standing challenge for the analog designer. While MOSFET amplifiers have extremely small bias currents, they exhibit much larger offset voltages and low-frequency noise than their BJT counterparts. A high-performance opamp in a 1 /spl mu/m 5 V digital CMOS technology achieves high DC gain, as well as excellent PSRR and CMRR and is capable of driving a 100 /spl Omega/, 1 nF load. It uses a mixed-mode (analog/digital) compensation loop to reduce input offset to <50 /spl mu/V. The loop uses digital offset extraction and storage circuitry, and has an analog current-mode output. Offset cancellation can be performed at power-up or upon request. Unlike existing commercially available low-offset high-precision amplifiers, the opamp needs only a single 5 V low-voltage supply, requires no trimming, and uses no BJTs or JFETs. Thus, although developed as a stand-alone product, it can potentially be used as an on-chip component of larger mixed-mode ICs.
  • Keywords
    CMOS analogue integrated circuits; compensation; operational amplifiers; 1 micron; 5 V; 50 muV; CMRR; PSRR; analog current-mode output; analog/digital compensation loop; autozeroed CMOS opamp; digital CMOS process; digital offset extraction/storage circuitry; high DC gain; high-precision amplifiers; low-offset amplifiers; mixed-mode compensation loop; offset cancellation; offset voltages; operational amplifiers; single 5 V LV supply; Bandwidth; CMOS process; CMOS technology; JFETs; Low-frequency noise; Low-noise amplifiers; MOSFET circuits; Operational amplifiers; Performance gain; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC., 1997 IEEE International
  • Conference_Location
    San Francisco, CA, USA
  • ISSN
    0193-6530
  • Print_ISBN
    0-7803-3721-2
  • Type

    conf

  • DOI
    10.1109/ISSCC.1997.585415
  • Filename
    585415