Ameliorating problems in system integration with time-triggered scheduling

Safety-critical system-of-systems need high dependability as failures can be catastrophic. Unfortunately, system dependability is sometimes sacrificed for cost, energy and performance reasons. This has been the case for the “time-triggered co-operative” (TTC) design methodology. Correct use of a TTC approach can guarantee a very high degree of reliability, robustness and predictability: incorrect use of the same approach can result in a lack of responsiveness and/or high jitter that impede smooth integration. In this paper, a case study explores the re-adoption of the TTC architecture, using a multi-core processor to increase responsiveness and “sandwich delays” to minimize task-release jitter. It is found that a multi-core TTC implementation is able to reduce release jitter and - by virtue of its increased capacity - can also tackle the latency problem.