Half-rail differential logic

Demand for low-power circuits has spurred designers to depart from conventional circuit techniques to venture into more power-efficient alternatives. Charge recycling improves power efficiency by re-using the stored charge in differential logic for precharging. In addition by drawing less current, switching noise on the supply rails is reduced due to reduced voltage swings at the output nodes. Half rail differential logic (HRDL) is an implementation of this power saving technique. An experimental eight-stage inverter chain in MOSIS 1.2 /spl mu/m verifies the performance of HRDL.