A De-synchronous Circuit Design Flow using Hybrid Cell Library

Asynchronous circuit dramatically reduces power and electromagnetic emission with respect to synchronous case, and can be easily integrated in a system on a chip (SOC). De-synchronous circuit is a commonly used asynchronous circuit. A de-synchronous circuit design flow is described in this paper. The hybrid cell library, consisting of standard cells and custom cells, is used. The standard cells are used in data path, while custom cells are used in control path. The overall design flow uses commercial EDA tools and is preferable for fast implementation. A 32-bit de-synchronous multiplier is designed and implemented in SMIC 0.35 mum process based on this design flow. The comparisons in area, performance and power consumption between de-synchronous and synchronous multipliers are also included