• DocumentCode
    3472769
  • Title

    Digital Circuits Using SOI Four-Gate Transistor

  • Author

    Akarvardar, K. ; Blalock, B. ; Chen, S. ; Cristoloveanu, S. ; Gentil, P. ; Mojarradi, M.M.

  • Author_Institution
    IMEP, Grenoble
  • fYear
    2006
  • fDate
    23-26 Oct. 2006
  • Firstpage
    1867
  • Lastpage
    1869
  • Abstract
    Novel G4-FET based logic-circuits (adjustable-threshold inverter, real-time reconfigurable logic gates and DRAM cell) are experimentally demonstrated. The independent action of the four gates helps minimize the required transistor count per logic function while enhancing design flexibility
  • Keywords
    DRAM chips; field effect transistors; logic circuits; logic gates; silicon-on-insulator; DRAM cell; G4 FET; SOI; adjustable threshold inverter; design flexibility; digital circuits; four gate transistor; logic circuits; logic function; real time reconfigurable logic gates; Digital circuits; Fabrication; Inverters; Logic circuits; Logic functions; MOSFET circuits; Random access memory; Reconfigurable logic; Silicon; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    1-4244-0160-7
  • Electronic_ISBN
    1-4244-0161-5
  • Type

    conf

  • DOI
    10.1109/ICSICT.2006.306491
  • Filename
    4098565
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3472769