• DocumentCode
    3473118
  • Title

    Neural Network Based VLSI Power Estimation

  • Author

    Hou, Ligang ; Zheng, Liping ; Wu, Wuchen

  • Author_Institution
    VLSI & Syst. Lab., Beijing Univ. of Technol.
  • fYear
    2006
  • fDate
    23-26 Oct. 2006
  • Firstpage
    1919
  • Lastpage
    1921
  • Abstract
    This paper forwards a neural network based method on VLSI power estimation. Power estimation technique was a tradeoff between precision and time. Simulation based power estimation gave the most accurate result but time consuming. Monte-Carlo and other statistical approaches estimated VLSI power in a less simulation dependent way and got accurate result using less time. This paper used neural network to perform VLSI power estimation. Experiments were made on ISCAS89 benchmark. Power estimation results from Murugavel, et al., 2002 and Bhanja, S and Ranganathan, N, 2003 were used as training or target vector. Different net structure, training plans and vector organizations were applied. For limited number of test vector (number of benchmark circuits), limited experimental results showed the neural network based power estimation method could give acceptable results with specific net structure. Power estimation runs faster. Linear regression is used to evaluate neural net. Probabilistic results of regression R-value are observed. Analysis shows that unfolded regression R-value sample fit normal distribution. This method can achieve a much faster power estimation result of VLSI on I/O and gate information without simulation and analysis of detail structure and interconnections
  • Keywords
    Monte Carlo methods; VLSI; integrated circuit modelling; neural nets; regression analysis; Monte Carlo methods; VLSI power estimation; gate information; linear regression; neural networks; regression R-value; target vector; training plans; vector organizations; Analytical models; Benchmark testing; Circuit testing; Gaussian distribution; Information analysis; Integrated circuit interconnections; Linear regression; Neural networks; Vectors; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    1-4244-0160-7
  • Electronic_ISBN
    1-4244-0161-5
  • Type

    conf

  • DOI
    10.1109/ICSICT.2006.306506
  • Filename
    4098580