DocumentCode :
3473228
Title :
Performance-driven global placement via adaptive network characterization
Author :
Ekpanyapong, Mongkol ; Lim, Sung Kyu
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
fYear :
2004
fDate :
27-30 Jan. 2004
Firstpage :
137
Lastpage :
142
Abstract :
Delay minimization continues to be an important objective in the design of high-performance computing system. We present an effective methodology to guide the delay optimization process of the mincut-based global placement via adaptive sequential network characterization. The contribution of this work is the development of a fully automated approach to determine critical parameters related to performance-driven multi-level partitioning-based global placement with retiming. We validate our approach by incorporating this adaptive method into a state-of-the-art global placer GEO. Our A-GEO, the adaptive version of GEO, achieves 67% maximum and 22% average delay improvement over GEO.
Keywords :
circuit layout CAD; circuit optimisation; flip-flops; adaptive network characterization; delay optimization process; mincut-based global placement; multi-level partitioning-based global placement; performance-driven global placement; Adaptive systems; Circuit optimization; Delay; Flip-flops; High performance computing; Iterative methods; Logic; Optimization methods; Performance gain; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2004. Proceedings of the ASP-DAC 2004. Asia and South Pacific
Print_ISBN :
0-7803-8175-0
Type :
conf
DOI :
10.1109/ASPDAC.2004.1337554
Filename :
1337554
Link To Document :
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