DocumentCode
3473245
Title
Temperature-aware global placement
Author
Obermeier, Bernd ; Johannes, Frank M.
Author_Institution
Inst. of Electron. Design Autom., Tech. Univ. of Munich, Germany
fYear
2004
fDate
27-30 Jan. 2004
Firstpage
143
Lastpage
148
Abstract
We describe a deterministic placement method for standard cells which minimizes total power consumption and leads to a smooth temperature distribution over the die. It is based on the quadratic placement formulation, where the overall weighted net length is minimized. Two innovations are introduced to achieve the above goals. First, overall power consumption is minimized by shortening nets with a high power dissipation. Second, cells are spread over the placement area such that the die temperature profile inside the package is flattened. Experimental results show a significant reduction of the maximum temperature on the die and a reduction of total power consumption.
Keywords
circuit layout CAD; power consumption; temperature distribution; deterministic placement method; power consumption; quadratic placement formulation; smooth temperature distribution; temperature-aware global placement; Capacitance; Circuits; Computational modeling; Electronic design automation and methodology; Energy consumption; Packaging; Power dissipation; Simulated annealing; Temperature distribution; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2004. Proceedings of the ASP-DAC 2004. Asia and South Pacific
Print_ISBN
0-7803-8175-0
Type
conf
DOI
10.1109/ASPDAC.2004.1337555
Filename
1337555
Link To Document