Title :
On designing robust testable PLA for path delay faults
Author :
Gupta, Bidyut ; Rajsuman, Rochit
Author_Institution :
Southern Illinois University
Keywords :
Circuit faults; Circuit testing; Delay effects; Life testing; Logic circuits; Logic testing; Manufacturing; Programmable logic arrays; Propagation delay; Robustness;
Conference_Titel :
Signals, Systems and Computers, 1989. Twenty-Third Asilomar Conference on
Print_ISBN :
0-929029-30-1
DOI :
10.1109/ACSSC.1989.1201048
