Data Path Design of an Embedded MCU Core

In this paper, the MCU core is partitioned into data path units and control units. Since the data path is one of the key factors that influence the performance of MCU, much effort has invested to its design. A data path model is elaborately designed. ALU is optimized using operand isolation for power reduction. Four-level read scheme is adopted for general purpose registers design in order to reduce the fan-out of the data bus. The HDL models for the bidirectional data bus and the design of special function registers are also presented. Experiments showed that the design implementation and optimization were very successful