DocumentCode
3474340
Title
The Design and FPGA Verification of a General Structure, Area-optimized Interpolation Filter Used in /spl Delta/-/spl Sigma/ DAC
Author
Huang, Xiaowei ; Han, Yan ; Chen, Lei
Author_Institution
Inst. of Microelectron. & Photoelectron., Zhejiang Univ.
fYear
2006
fDate
23-26 Oct. 2006
Firstpage
2111
Lastpage
2113
Abstract
This paper describes a general structure, area-optimized interpolation filter used in the Delta-Sigma digital-to-analog converter (DAC) intended for the portable digital audio system. The whole filter system simulation, verilog implement and FPGA verification are processing, the signal-to-noise(S/N) achieves 115 dB and the total area is small enough which has good prospect for the audio applications
Keywords
delta-sigma modulation; digital audio broadcasting; field programmable gate arrays; hardware description languages; DeltaSigma DAC; FPGA verification; audio applications; filter system simulation; interpolation filter; portable digital audio system; signal-to-noise; verilog implement; Attenuation; Cutoff frequency; Digital filters; Field programmable gate arrays; Hafnium; Interpolation; Mathematical model; Passband; Signal design; Signal processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location
Shanghai
Print_ISBN
1-4244-0160-7
Electronic_ISBN
1-4244-0161-5
Type
conf
DOI
10.1109/ICSICT.2006.306632
Filename
4098641
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