DocumentCode
3474386
Title
DES Decoding Using FPGA and Custom Instructions
Author
Lee, Tai-Chi ; Zeien, Richard ; Roach, Adam ; Robinson, Patrick
Author_Institution
Dept. of Comput. Sci., Saginaw Valley State Univ.
fYear
2006
fDate
10-12 April 2006
Firstpage
575
Lastpage
577
Abstract
Data encryption standard (DES) encryption has been commercially available and implemented for many years, and offers some insights into the use of FPGA and custom hardware instructions to decipher coded DES messages. This paper presents an approach using FPGA based processing instructions to decipher messages using parallel processing on the chip
Keywords
cryptography; field programmable gate arrays; parallel processing; standards; DES decoding; FPGA; data encryption standard; parallel processing; Algorithm design and analysis; Control systems; Cryptography; Decoding; Field programmable gate arrays; Hardware; Integrated circuit interconnections; Logic; Parallel processing; TCPIP; DES; Decoder; Decryption; Encoder; Encryption; Parallel Processing; Security;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Technology: New Generations, 2006. ITNG 2006. Third International Conference on
Conference_Location
Las Vegas, NV
Print_ISBN
0-7695-2497-4
Type
conf
DOI
10.1109/ITNG.2006.49
Filename
1611659
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