DocumentCode
3474546
Title
A New LFSR Reseeding Method for BIST
Author
Yan, Yong-zhi ; Wang, Hong ; Yang, Zhi-jia ; Yang, Song
Author_Institution
Shenyang Inst. of Autom., Chinese Acad. of Sci., Shenyang
fYear
2006
fDate
23-26 Oct. 2006
Firstpage
2145
Lastpage
2147
Abstract
This paper presents a new BIST reseeding method that can significantly increase the ratio of test data compression using one LFSR seed to encode multiple deterministic test patterns. Experimental results on ISCAS89 benchmark circuits show that this method has about 30% reduction of the seed number
Keywords
built-in self test; data compression; shift registers; BIST; LFSR reseeding; built-in self test; linear feedback shift register; test data compression; Automatic test pattern generation; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Encoding; Equations; Flip-flops; Test data compression; Test pattern generators;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location
Shanghai
Print_ISBN
1-4244-0160-7
Electronic_ISBN
1-4244-0161-5
Type
conf
DOI
10.1109/ICSICT.2006.306664
Filename
4098651
Link To Document