Design a fast CAM-based information detection system on FPGA and 0.18µm ASIC technology

Author

Duc-Hung Le ; Inoue, Ken ; Cong-Kha Pham

Author_Institution

Univ. of Electro-Commun., Tokyo, Japan

fYear

2013

fDate

3-5 June 2013

Firstpage

1

Lastpage

2

Abstract

A novel information detection method has been proposed for a fast and efficient search engine. This method is implemented on hardware system using FPGA in advance for functional verification and then on ASIC using 0.18μm CMOS technology. We take advantages of Content Addressable Memory (CAM) which has an ability of parallel multi-match mode for designing the system. The system operates based on CAM blocks for pattern matching in parallel manner to return multiple addresses of multi-match results. Based on the parallel multi-match operations, the system can be applied to pattern matching or searching applications with various constraint search patterns without using any search principles. This increases the matching performance of the search systems.

Keywords

CMOS memory circuits; application specific integrated circuits; content-addressable storage; field programmable gate arrays; pattern matching; ASIC CMOS technology; FPGA; constraint search patterns; content addressable memory; fast CAM-based information detection system; functional verification; hardware system; parallel multimatch mode; parallel multimatch operations; pattern matching; search engine; search systems; size 0.18 mum; Application specific integrated circuits; CMOS integrated circuits; CMOS technology; Computer aided manufacturing; Field programmable gate arrays; Hardware; Search engines; ASIC; Content Addressable Memory; FPGA; Information Detection; multi-match; parallel operation;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits (EDSSC), 2013 IEEE International Conference of

Conference_Location

Hong Kong

Type

conf

DOI

10.1109/EDSSC.2013.6628041

Filename

6628041