The research of FPGA-based loop optimization pipeline scheduling technology

The loop pipeline scheduling is to schedule the operations in loop body to each pipeline stage; the scheduling results directly affect the maximum clock frequency and the resources consumed. As the pipeline scheduling is very flexible, therefore getting a relatively optimized scheduling is difficult. Based on pipeline scheduling types and scheduling principles, an optimized pipeline scheduling method is presented. The method takes into account circuit clock frequency, time interval to start pipeline and pipeline stages to get a higher performance hardware scheduling. Experiments show that it can both improve the clock frequency and reduce the time interval to start pipeline.