Concentrated mesh and fat tree usage efficiency in System-on-Chip based multiprocessor distributed processing architectures

Distributed Processing Systems (DPS) take sophisticated tasks as input, and process them in a distributed manner using spread resources. In this paper, we evaluate DPS implemented on low-level System-on-Chip (SoC) interconnection architectures: mesh, concentrated mesh and fat tree. We propose autonomous algorithms for nodes and routers and define efficiency metrics that are used later for evaluation. The evaluation is performed by a dedicated experimentation system, in which fully functional DPS is implemented. In this paper, we focus on resource utilization in interconnection networks and also present their energy consumption. Tradeoff between utilization and electrical energy consumption is presented. Research results show that the concentrated mesh is a promising interconnection network suitable to handle the needs of distributed processing systems.