The Correlation of Interface Defect Density and Power-Law Exponent Factor on Ultra-thin Gate Dielectric Reliability

Interface defect density on 90 nm PFET ultra-thin gate dielectric is checked by using a near flat band SILC in this work. Although power-law model has been successfully adopted to explain the gate oxide breakdown phenomenon below 2.0nm in industry field (Wu et al., 2000), (Ohgata et al., 2005), (Naoyoshi et al., 2003) and (Mariko et al., 2001), a correlation between power-law model with interface defect density has been made first time in this investigation. Critical defect density (N_BD) shows strong correlation with power-law exponent factor due to SILC leakage increasing ratio (dJ/J₀) dominate dielectric breakdown on our decouple plasma nitridation (DPN) power splits. A preliminary model is proposed to explain the nitridation-induced oxide reliability degradation mechanism. Since larger concentration of Nitrogen incorporation will cause excess interface states, those energy levels may reduce proton tunneling barrier in anode hydrogen release (AHR) behavior, thus further enhance AHR effect to degrade oxide breakdown strength