Threshold voltage model for double gate p-IMOS

IMOS device with the low static power consumption and the sub threshold swing is obviously superior to the traditional CMOS device. However, the single gate IMOS (SG IMOS) requires a relatively high gate voltage to cause the avalanche breakdown, and the partition structure of its channel leads to a reduction of the integration degree. This paper presents a double gate p-IMOS (DG p-IMOS). By solving the two-dimensional Possion equations and using the different regions of different electric field distribution and the avalanche breakdown condition, DG p-IMOS threshold voltage equation is obtained. By analyzing the model, the dependences of threshold voltage on drain-source voltage, Si layer thickness and gate length are studied. The model is compared with the SG p-IMOS to verify the advantages of DG p-IMOS. The results of the model are in good agreement with the 2D simulation results.