Enabling on-chip diversity through architectural communication design

In this paper, we explore a new concept, called on-chip dive+, and introduce a design methodology for such emerging system. Simply speaking, on-chip diversity means mixing ditTemt architectures and/or technologies in a multiple voltagdfrequency island setup in order to achieve the highest levels of performance, fault-tolerance and the needed flexibility in SoC design. As the main contribution, we present the challenges in implementing an efticient communication architecture for on-chip diversity and outline a unified framework which addresses some of these issues. We then provide comparative experimental results and make a qualitative analysis of different architectural choices in the design of the on-chip communication. Having the acoustic beamforming as driver application, we show that an efticient communication infrastructure can be constructed by carefully analyzing the characteristics of the application and the required levels of power, performance and fault-tolerance.