DocumentCode :
3476186
Title :
A compressed frame buffer to reduce display power consumption in mobile systems
Author :
Hojun Shim ; Nachyuck Chang ; Pedram, M.
Author_Institution :
Seoul National University
fYear :
2004
fDate :
27-30 Jan. 2004
Firstpage :
819
Lastpage :
824
Abstract :
Despite the limited power available in a batteryoperated hand-held device, a display system must still have an enough resolution and sufficient color depth to deliver the necessary information. We introduce some methodologies for frame buffer compression that efficiently reduce the power consumption of display systems and thus distinctly extend battery life for hand-held applications. Our algorithm is based on a run-length encoding for on-the-fly compression, with a negligible burden in resources and time. We present an adaptive and incremental re-compression technique to maintain efficiency under frequent partial frame buffer updates. We save about 30% to 90% frame buffer activity on average for various hand-held applications. We have implemented an LCD controller with frame buffer compression occupying 1,026 slices and 960 flip-flops in a Xilinx Sprantan-I1 FPGA, which has an equivalent gate count of 65,000 gates. It consumes 30mW more power and 10% additional silicon space than an LCD controller without frame buffer compression, but reduces the power consumption of the frame buffer memory by 400mW.
Keywords :
Application software; Batteries; Computer displays; Degradation; Encoding; Energy consumption; Field programmable gate arrays; Flip-flops; Liquid crystal displays; Thin film transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2004. Proceedings of the ASP-DAC 2004. Asia and South Pacific
Conference_Location :
Yohohama, Japan
Print_ISBN :
0-7803-8175-0
Type :
conf
DOI :
10.1109/ASPDAC.2004.1337707
Filename :
1337707
Link To Document :
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